Embedded

PendSV Allows Simple and Efficient Context Switch on Cortex-M

Centralizing context switch logic in PendSV simplifies concurrency reasoning and enhances system performance by reducing register preservation overhead of all other exceptions.

Jun 10, 2024

Offloading Operating System Functions to the Cloud
Offloading Operating System Functions to the Cloud

Feb 4, 2024

Panic Recovery in Rust-based Embedded Systems
Panic Recovery in Rust-based Embedded Systems

Oct 23, 2023

SVC Can Be Invoked Asynchronously When Dynamically Changing Exception Priority on Cortex-M

SVC will be pended if a higher priority exception arrives during the stacking. If the priority of SVC is raised above the previously higher priority exception inside its handler, SVC will be activated immediately, nested above the current handler, which causes problems because the register context seen by the SVC handler is not system call arguments.

Jul 6, 2023

Read-Modify-Write On Self-Changing Registers Causes Trouble

Read-modify-write on the `cr1` register of I²C may generate two consecutive start condition and hang the peripheral.

Jul 2, 2023

Fix Rust Library stm32f4xx-hal Causing I²C to Hang When Using DMA

The Rust HAL Library `stm32f4xx-hal` failed to set the `LAST` bit in I²C `CR2` before initiating a DMA read. We tracked down the problem with a logic analyzer and identified the fix.

Apr 18, 2023

Resolving STM32F4xx I²C Stuck Busy After MCU Software Reset

The I²C bus may be stuck busy after a software reset if the slave peripheral is holding the SDA line upon reset. Manually generating some clock pulses on the SCL line and sending a NACK on the SDA line will make the peripheral to release the SDA line, allowing normal operation.

Apr 18, 2023

Resolving STM32F4xx I²C Stuck Waiting for Address Sent

STM32F4xx I²C can be stuck after start condition when the stop bit is set while the I²C bus is already idle.

Apr 12, 2023

Bringing Segmented Stacks to Embedded Systems
Bringing Segmented Stacks to Embedded Systems

Feb 22, 2023

Thumb2 Instructions Require 4-Byte Alignment Rather Than 2-Byte

We discuss why 2-byte alignment is not sufficient for thumb2 instructions even though the ISA supports an arbitrary mixture of 2- and 4-byte instructions.

Aug 15, 2022